ECS最新推出ECS-2012MV-327KE，是一款具有MultiVolt功能的2.0x1.2x0.85mm陶瓷封装，32.768K晶振 HCMOS振荡器。这种小型电子元器件提供低电流消耗和相对于未补偿晶体振荡器的改进的稳定性。

这些电子元件提供32.768kHz的频率，频率稳定度为10ppm，在-40°C至+85°C的标准工业工作温度下具有0.5A的低功耗。作为MultiVolt系列晶体振荡器的一部分，ECS-2012MV-327KE设计采用1.2V至5.5V的可变电源电压或标准1.8V、2.5V、3.0V或3.3V电源供电。该器件ECS-2012MV-327KE针对各种无补偿晶体振荡器提供更高的稳定性，是智能电表、可穿戴设备、工业和物联网应用的理想之选。

ECS晶振扩展了符合AEC-Q200标准的ECS-327ATQMV MultiVolt TM振荡器系列，增加了两个部件号，以涵盖更多应用。两个新的部件号是 ECS-327ATQMV-BP-TR，在 -40℃至+105℃下提供±50ppm的稳定性， ECS-327ATQMV-CN-TR 在 -40℃~ 85℃下提供±25ppm的稳定性。 

32.768kHz低功耗晶体振荡器ECS-327ATQMV-AS-TR适用于通用微处理器

爱普生X1G005471001100压控晶振具有LV-PECL差分输出,5032mm晶振

压控晶振(VCXO)是一种石英晶体振荡器，其振荡效率可以通过红外线加控制电压来改变或调制。它的振荡频率由晶体决定，频率可以通过控制电压在小范围内调节。VCXO多用于锁相技术和频率负反馈调制。通常，控制电压范围为0V至2V或0V至3V。VCXO的调谐范围为100ppm至200ppm。

日本进口爱普生晶振VG-4231CE，是一款VCXO压控晶体振荡器，频率范围:3MHz至50MHz*，*50MHz不包括在输出频率范围内，电源电压:3.3V(PSCM/CSCM)，2.8V(PSBM/CSBM)，1.8V (PQEM/CQEM)，频率控制范围:140×10-6 (*SCM/*SBM)，120×10-6 (*QEM)，低功耗:1.0mA(典型值)。(27M，3.3V)，小体积晶振尺寸:3.2x2.5mm，有源晶振，四脚贴片晶振，输出波形CMOS，无铅/符合欧盟RoHS指令，标准参考重量26毫克，具有超小型，轻薄型，低功耗，低抖动，低电源电压，低损耗，低耗能等特点，多用于锁相技术、频率负反馈系统和频率调制，已成为通信机、移动电话、寻呼机、全球定位系统(GPS)等许多电子应用系统必不可少的关键部件。

VG-4231CE编码Q3614CE00008200压控晶振多用于锁相技术和频率负反馈调制

1XXB24000MEA|DSB221SDN晶振|24M温补晶振

1XXB24000MEA晶振产品尺寸图

1XXB24000MEA晶振产品电气表

关于1XXB24000MEA|DSB221SDN晶振|24M温补晶振 产品安装的注意事项

终端/陆上布局/金属屏蔽孔

1端子A通孔不在底部（安装侧）。
2土地图案布局/金属掩模孔以下土地图案为参考设计。电气特性应满足安装在这片土地上的要求。在测试用地和安装用地不相连的范围内，可以改变接地方式。

对电特性没有任何影响。面罩厚度建议为0.12毫米。

1XXB38400MCB|KDS晶振|DSB221SDN晶振|温补晶振

1XXB38400MCB晶振产品尺寸图

1XXB38400MCB晶振产品电气表

关于1XXB38400MCB|KDS晶振|DSB221SDN晶振|温补晶振 产品安装的注意事项

终端/陆上布局/金属屏蔽孔

1端子A通孔不在底部（安装侧）。
2土地图案布局/金属掩模孔以下土地图案为参考设计。电气特性应满足安装在这片土地上的要求。在测试用地和安装用地不相连的范围内，可以改变接地方式。

对电特性没有任何影响。面罩厚度建议为0.12毫米。

FOX晶振生产的FK135系列，编码FK135EIHM0.032768-T3，两脚贴片晶振，频率32.768kHz，小体积无源晶振尺寸3.2x1.5mm表面贴装，石英晶体谐振器，ESR（等效串联电阻）:70kΩ，负载电容：12.5pF，频率容差±20ppm，工作温度：-40℃至+85℃，符合 RoHS/RoHS II标准，无铅 (Pb)

FOX晶振FK135系列编码FK135EIHM0.032768-T3是一款小体积无源晶振

伊利诺伊州莱尔–CTS公司（纽约证券交易所代码：CTS）宣布推出一款新的TCXO晶振，其工作频率为32.768kHz，适用于需要精密实时时钟参考的应用。TT32型四脚贴片晶振提供非常严格的频率稳定性，在-40℃至+85℃范围内为±5.0ppm，可在温度变化时保持准确的时间；与使用具有经典抛物线温度曲线、+25℃转换点和-0.035ppm/℃ 2温度系数的音叉谐振器的简单晶体器件相比。

CTS发布32.768kHz TCXO用于实时时钟应用,TC32M5I32K7680,低功耗晶振

我们的多输出和高度灵活的基于石英和MEMS的PureSilicon? 振荡器采用各种行业标准封装，可满足您的低功耗或低抖动应用的要求。使用我们的Clockworks ? 配置器和采样工具可以轻松地将您的振荡器定制为频率、温度、ppm和封装尺寸的任意组合，以满足您的应用要求。
Microchip的VT-701A系列温度补偿晶体振荡器 (TCXO) 是一款石英稳定、削波正弦波或CMOS输出、模拟温度补偿晶振，采用小体积尺寸7.0x5.0mm 密封陶瓷封装，采用2.5V或3.3V电源供电。
产品特点：
削波正弦波或CMOS输出
5MHz至52MHz输出频率
+/-50ppb温度稳定性
可选频率调谐
电源电压 2.5V,3.3V
最小输出频率 5MHz
最大输出频率 52MHz
输出逻辑 CMOS，削波正弦波

VT-701A系列VT-701A-HFE-507B-10M0000000可满足您的低功耗或低抖动应用的要求,温补晶体振荡器

大真空旗下两款基站用Oscillator性能详细剖析介绍.

DC7050AS和DSA/DSB535SGA是大真空旗下的可用于通信基站的石英晶振产品,其中DC7050AS是一款恒温晶振, DSA/DSB535SGA中DSA系列是压控温补晶振,DSB系列是温补晶振系列;对于通信基站来说,工作环境的复杂性决定了它所使用的晶体频控元件必须是能够承受复杂环境所带来的的影响.

The 'ageing' of a quartz crystal results in a small change of frequency over time and this effect may have to be taken into account by the customer when designing their circuit depending upon the overall specification that needs to be achieved. There are two main causes of ageing in quartz crystals, one due to mass-transfer and the other due to stress.

Mass-Transfer

Any unwanted contamination inside the device package can transfer material to or from the SMD CRYSTALcausing a change in the mass of the quartz blank which will alter the frequency of the device. For example, the conductive epoxy used to mount the quartz blank can produce 'out-gassing' which can create oxidising material within the otherwise inert atmosphere inside the sealed crystal package and so this production process must be well controlled. Ideally the manufacturing method is as clean as possible to negate any effects and give good ageing results.

Stress

This can occur within various components of the crystal from the processing of the quartz blank, the curing of the epoxy mounting adhesive, the crystal mounting structure and the type of metal electrode material used in the device.Heating and cooling also causes stress due to different expansion coefficients. Stress in the system usually changes over time as the system relaxes and this can cause a change in frequency.

Ageing in practice

When looking at example ageing test results of crystals,it can be seen that the change in frequency is generally greatest in the 1st year and decays away with time. It must be noted however that for example if a device is specified at ±5ppm max per year; it does not follow that the ageing after 5 yrs will be ±5ppm x 5yrs, i.e. ±25ppm. In practice,the example ±5ppm ageing device may be only ±1ppm to ±2ppm in the 1st year of operation and then reduces over subsequent years. It is common to use a general 'guide-rule' for crystal ageing of ±10ppm max over 10 years although in reality it is usually much less than this. It is impossible to predict the exact ageing of a device as even parts made at the same time and from the same batch of quartz will exhibit slightly different ageing characteristics.The production process must be consistent from part to part, from the manufacture of the quartz blank, the electrode size and its placement, to the epoxy used to mount the quartz and its curing thermal profile, all have a slight affect on frequency. Devices can age negatively or positively depending upon the internal causes although parts from one batch tend to follow similar results. Generally the ageing effect is negative in over 90% of parts manufactured.

Accelerated ageing

It is common industry practice to use an accelerated ageing process to predict long term frequency movement by soaking devices at elevated temperatures and measuring frequency movement at relevant intervals. It is normal to test crystals using a passive test (i.e. non-powered). The general rule used is that soaking a crystal at +85℃ for 30 days is equivalent to 1 year of ageing at normal room temperature. If this test is extended for enough time then the recorded data can be plotted graphically to enable via extrapolation, the prediction of future long term ageing.

Frequency adjustment

Note that the ageing of quartz effectively changes the frequency tolerance of the crystal and does not directly influence the stability of the quartz over temperature to any great degree as this parameter is dictated by the 'cut-angle' of the quartz used. If using quartz oscillators that have a voltage-control function such as VCXOs, TCXOs or OCXOs, the output frequency can be adjusted back to its nominally specified value.

Design

The engineer designing a circuit using either a crystal or oscillator will generally know what overall stability figure their equipment must meet over a particular time period.

As the tolerance and/or stability of a device decreases then the more important ageing becomes. For example using a TCXO at ±1ppm stability over temperature will require ageing to be kept to relatively small values. However, if the total frequency movement allowance of a design is for example ±200ppm and a device with a rating of ±100ppm is used then a small amount of ageing can effectively be ignored.

About Crystal parameters description,Crystal Project Name

AT Cut Crystals

For precise frequency control in radio and line communication systems, quartz crystal resonators have proved indispensable. The material properties of crystalline quartz are such that quartz resonators display stableness and Q factors that cannot be matched by other types of resonator over the frequency range from 1 MHz to 200 MHz.

Equivalent Circuit

Fig-1 shows the conventionally accepted equivalent circuit of a crystal resonator at a frequency near its main mode of vibration. The inductance LI reiperesents the vibrating mass, the series capacitance CL the compliance of the quartz element and the resistance Rl the internal frication of the element, mechanical losses in the mounting system and acoustical losses to the surrounding environment.

The shunt capacitance Co is made up of the static capacitance between the electrodes, togettier with stray capacitances of the mounting system. 

There are two zero-phase frequencies associated with this simple circuit, one is at series resonance fs, another at antiresonance fa. When used in an oscillator, crystal units will operate at any frequency within the broken lines of Fig-2 as determined by the phase of the maintaining circuit.

By changing of this reactive condition, the crystal frequency may be trimmed in a limited extent. The degree to which this frequency may be varied (frequency pulling) is inversely proportional to the capacitance ratio r(C〇 /Ci).

Load Capacitance

Many practical oscillator circuits make use of a load capacitor CL in series or parallel with the crystal, either in order to provide a means for final frequency adjustment, or perhaps for modulation or temperature compensation purposes. For the crystal load capacitance. We looking into the circuit through the two crystal terminals, the load capacitance need to specified when the crystal is paralleled mode, crystal load capacitance is calculated as below: 

Frequency Pulling

In many applications a variable capacitor (trimmer) is used as the load reactive element to adjust the frequency. The fractional frequency range available between specified values of this load reactive element is called the pulling range (PR.) and it can be calculated by using the following formula: 

Sensitivity

A useful parameter to the design engineer is the pulling sensitivity (S) at a specified value of load capacitance. It is defined as the incremental fractional frequency change for an incremental change in load capacitance. It is normally expressed in ppm/pF (10-6/pF) and can be calculated from the formula: 

It is very important to define the mean load capacitance to enable the actual crystal frequency be set within the tolerances of the specified nominal frequency. It is also important to use, wherever possible, standard values of load capacitance; for example:20pF, 30pF.

Fig-3 shows the relationship between LO.; P.R. and S. 

Frequency Pulling Calculation

An approximation to the pulling for any crystal can be calculated from this simple formula:

Resistance

The equivalent circuit of the crystal has one other important parameter: This is Ri, the motional resistance. This parameter controls the Q of the crystal unit and will define the level of oscillation in any maintaining circuit. The load resonance for a given crystal unit depends upon the load capacitance with which that unit is intended to operate. The frequency of oscillation is the same in either series or parallel connection of the load capacitance.

If the external capacitance is designated the load resonance resistance may be calculated as follows:

The equivalent shunt or parallel resistance at load resonance frequency is approximately: 

It should be remembered that Ri does not change thus the effective parameters of any user network can be readily calculated.

Frequency Temperature Characteristics

The AT-cut crystal has a frequency temperature characteristic which may be described by a cubic function of temperature. This characteristic can be precisely controlled by small variations in the exact angle at which the crystal blank is cut from the original quartz bar. Fig,4 illustrates some typical cases. This cubic behaviour is in contrast to most other crystal cuts, which have parabolic temperature characteristics.

As a consequence, the AT-cut is generally the best choice when specifying a unit to operate over a wide temperature range, and is available in a range of frequencies from 1 to 200 MHz.

在当今的高性能系统中，需要一个出色的时钟源。随着专用集成电路（ASIC）的速度和性能达到更高的限制，分配该时钟源以驱动多个设备的需求变得更加困难。由于相关的快速边沿速率，系统中部署的较高频率导致长PCB迹线表现得像传输线。保持平衡系统需要适当的端接技术来实现应用中的跟踪路由。本应用笔记将重点介绍推荐的终止技术;关于输出负载的评论，并提供一些设计师要考虑的布局指南。

传输线理论简介

通常，大多数时钟源具有低阻抗输出。当这些器件用于驱动具有大阻抗的负载时，存在阻抗不匹配。根据应用条件，此阻抗不匹配会导致负载产生电压反射，从而产生时钟波形中的步进，振铃以及过冲和下冲。这可能通过降低负载处的时钟信号，错误的数据时钟和产生更高的系统噪声而导致系统性能不佳。

为了减少电压反射，需要正确终止信号迹线。适当终止的设计考虑因素可以用两个语句来概括：

1.使负载阻抗与线路阻抗相匹配

2.使源阻抗与线路阻抗匹配

对于大多数设计，第一种说法是首选方法，因为它消除了返回时钟源的反射。这样可以减少噪音，电磁干扰（EMI）和射频干扰（RFI）。

下图显示了阻抗不匹配对时钟源的影响

常用终止技术

如上所述，为了减少电压反射，必须正确地终止迹线。 传输线的四种基本端接技术是串联，并联，戴维宁和AC。

系列终止

串联终端消除了时钟源的反射，有助于保持信号质量。 这最适合驱动少量负载的TTL器件，因为时钟输出阻抗小于传输线特性阻抗。 图1显示了一系列终端。 电阻尽可能靠近时钟源放置。 R的典型设计值为10Ω至75Ω。

R的值可以大于阻抗差，以便产生稍微过阻尼的状态并且仍然消除来自时钟源的反射。

系列终端的主要优点是：

1.简单，只需要一个电阻器

2.功耗低

3.在驱动高容性负载时提供电流限制;这还可以通过减少接地反弹来改善抖动性能

系列终止的主要缺点是：

1.增加负载信号的上升和下降时间;这在一些高速应用中可能是不可接受的

2.无法驱动多个负载

平行和戴维宁终结

接下来的三种终端技术可提供更清晰的时钟信号，并消除负载端的反射。这些终端应尽可能靠近负载放置。

图2描绘了并行终端。并联终端消耗的功率最大，不建议用于低功率应用。它也可能改变占空比，因为下降沿将比上升沿更快。它比串联终端具有一个优点，即上升和下降时间的延迟大约是一半。

如图3所示，戴维宁终端将比并联终端消耗更少的功率，并且通常用于PECL应用，50Ω线路匹配至关重要。 R的总值等于传输线的特征阻抗。 如果需要过阻尼状态，则R的总值可略小于特征阻抗。 戴维宁终端的主要缺点是每条线路需要两个电阻器，并且在终端附近需要两个电源电压。 建议不要将此端接用于TTL或CMOS电路。

AC终止

AC端接，如图4所示，在并联支路中增加了一个串联电容。 由于RC时间常数，电容会增加时钟源的负载和延迟，但在稳态条件下将消耗很少或没有功率。 通常不建议使用此终端，因为它会通过增加传播延迟时间来降低时钟信号的性能。 为了保持有效终止，C L的值不应小于50pF。 较大的C L值将允许时钟边沿的快速转换，但随着电容器值的增加，较高的电流电平将通过，从而导致功耗的增加。 选择大于走线阻抗的R L值，以考虑负载输入阻抗的泄漏。

输出负载简介

应注意不要使时钟源过载。 如果使用单个时钟源来驱动多个负载，则如果总负载超过时钟源的驱动能力，则会发生波形劣化。

过载的一些常见症状是波形削波，对称不平衡，信号幅度减小以及上升和下降时间值的变化。 通常随着时钟频率的增加，源驱动更高负载的能力将降低。 请务必参考时钟源规范以获得最大负载能力。

下图显示了重载对时钟源的影响。

通用时钟输出类型

CTS时钟振荡器设计已经开发出来，具有各种封装选项，输入电压和输出类型。

HCMOS和HCMOS / TTL兼容

今天的CTS设计提供“双兼容”振荡器，它们是能够驱动TTL应用的HCMOS输出类型。 由于转换时间较短，这些设备固有地具有更大的过冲和欠冲。 这可能不适合具有严格EMI要求的旧TTL设计。

CTS生产两种流行的HCMOS / TTL兼容时钟振荡器CB3 / CB3LV和型号636。

下图显示了典型的HCMOS测试负载配置和波形参数。

LVPECL和LVDS

与HCMOS逻辑技术相比，CTS LVPECL和LVDS逻辑输出设计具有许多优势。

LVPECL和LVDS技术从正电源获得其工作功率，从而实现与负载点处的HCMOS逻辑接口的必要兼容性。 这些逻辑输出还具有：

1.降低系统抖动; 由于较小的特征过渡区域

2.上升和下降时间更快

3.提供差分输出; 减少排放至关重要

4.能够直接驱动50Ω传输线

5.降低高频时的电源消耗

CTS Model 635提供两种输出类型的选项。

下图显示了典型的LVPECL和LVDS测试负载配置和波形参数

布局指南

在印刷电路板布局过程中采用良好的设计实践将最小化先前讨论的信号劣化。 PCB设计的一些常见指南是：

1.将时钟源物理定位在尽可能靠近负载的位置

2.限制时钟信号的走线长度

3.不要将时钟信号靠近电路板边缘

4.尽量避免在时钟信号路由中使用过孔。 过孔会改变走线阻抗，从而引起反射。

5.不要在电源和接地层上布设信号走线

6.避免在轨迹中出现直角弯曲，如果可能，请保持直线行程。 如果需要弯曲，请使用两个45°角或使用圆形弯曲（最佳）.

7. V CC与时钟源地之间的去耦电容对于降低可能传输到时钟信号的噪声至关重要。 这些电容必须尽可能靠近V CC引脚。

8.为避免串扰，请在多个时钟源和高速开关总线之间保持适当的间隔。

9.差分跟踪路由应尽可能接近，以获得高耦合系数。 路由的长度应相等，以避免阻抗不匹配，从而导致不同的传播延迟时间。

10.使用单个时钟源驱动多个负载时，请考虑拆分路由。 使各个布线长度尽可能相等。

结论

本应用笔记介绍了使用驱动各种负载的时钟源的应用的正确终端技术。 它还概述了用于生成可靠应用程序设计的布局考虑因素 所有这些技术都力求最大限度地减少降低时钟信号的条件，从而导致系统性能不佳。

KDS 晶振即是日本大真空株式会社（DASHINKU CORP）,成立于 1951 年,至今已有 50 多年的历史,是全球领先的三大晶振制造商之一,其制造工厂主要分布在日本本土、中国、泰国、印度尼西亚等十多个制造中心,KDS 大真空集团总公司位于日本兵库县加古川,在泰国,印度尼西亚,台湾,中国天津这些大城市均有生产工厂,其中天津工厂是全球晶振行业最大的单体制造工厂,也是全球最大的 TF 型晶振制造工厂.

首先非常的感谢你长期以来对【日本大真空株式会社】,KDS 晶振品牌的支持与厚爱.在此郑重声明,本集团以下简称（KDS）在中国的代理商除了北京中国电子研究院,广州电子研究所,【泰河电子】,香港 KDS办事处,台湾KDS办事处,是正规的代理销售企业,其余地区以及公司,个人所销售的KDS产品均不能保证是原装正品,请你选择正规渠道定制货品.

1XTV26000AAD|KDS晶振|株式会社大真空|VC-TCXO振荡器

1XTV26000AAD晶振产品尺寸图

1XTV26000AAD晶振产品电气表

关于1XTV26000AAD压控温补振荡器产品安装的注意事项

终端/陆上布局/金属屏蔽孔

1端子A通孔不在底部（安装侧）。
2土地图案布局/金属掩模孔以下土地图案为参考设计。电气特性应满足安装在这片土地上的要求。在测试用地和安装用地不相连的范围内，可以改变接地方式。

对电特性没有任何影响。面罩厚度建议为0.12毫米。

包装条件
胶带包装
（1）压花胶带格式及尺寸
（2）卷筒数量:最多2000个/卷
（3）胶带规格
不缺产品。
（4）卷筒规格见图3
包装
产品用防静电袋包装。
*湿度敏感度等级：IPC/JEDEC标准J-STD-033/1级
无需干燥包装，无需重新储存后烘烤。

包装箱
最多10卷/包装箱。但是，在少于10卷的情况下，它由任何盒子容纳。
盒子里的空间用垫子填满了。

日本村田新研发出一款MEMS谐振器，尺寸仅有0.9*0.6*0.3mm。实现了现石英晶体谐振器达不到超小尺寸，并且低ESR特性的产品。MEMS谐振器的诞生可代替许多石英晶体谐振器。有很多人就想问了什么是MEMS谐振器？它跟振荡器有什么区别？MEMS谐振器有哪些特点？工作原理有哪些？使用都需要注意一些什么问题？等等一大串的问题就随之而来了。

那么我们将一一把问题给大家回复。

首先，大家肯定是会对日本村田陶瓷晶振制作所研发出的产品有些疑问，什么是MEMS呢？其实MEMS指的是微机电系统（Micro Mlectro Mechanical Systems),这种装置运用了半导体生产工艺技术，具有三维微细结构。除了面对MEMS谐振器还有一种是振荡器，MEMS振荡器跟其它普通石英晶体振荡器是一样的，将振荡用电路也谐振器融为一体的装置。可用科尔皮兹振荡电路之类的普通振荡电路驱动。

WMRAG32K76CS1C00R0谐振器是村田MEMS技术的代表作品。该产品具有体极柢的ESR特性以及极小尺寸封装，这个是目前石英晶体谐振器无法实现的突破。极小的尺寸有助于减小安装面积，通过优化IC增益，实现了低ESR的MEMS谐振器，降低了功耗。也可用于回流焊接，引线键合和传递模型。WMRAG32K76CS1C00R0谐振器具有晶体该有的特性，32.768KHZ标频以及20PPM标准稳定偏差。可在-30~+85度下正常工作。驱动电平在0.2μW以内。当您考虑置换晶体的时候，要注意晶体谐振器和MEMS谐振器的负载电容量值不同。

并且要知道MEMS谐振器与普通石英晶体谐振器的区别。

1. Introduction 

When ordering crystals for oscillators that are to operate at a frequency f, e.g. 32.768 kHz or 20 MHz, it is usually not sufficient to specify the frequency of operation alone. While the crystals will oscillate at a frequency near their series resonant frequency, the actual frequency of oscillation is usually slightly different from this frequency (being slightly higher in “parallel resonant circuits”).1 

So, suppose you have a crystal oscillator circuit and you want to purchase crystals such that when placed in this circuit the oscillation frequency is f. What do you need to tell the crystal manufacturer to accomplish this? Do you need to send a schematic of the oscillator design with all the associated details of its design, e.g. choice of capacitors, resistors, active elements, and strays associated with the layout? Fortunately, the answer is no. In addition to the frequency f, all that is needed is a single number, the load capacitance CL . 

2. What is CL ? 

Suppose your crystal oscillator operates at the desired frequency f. At that frequency, the crystal has complex impedance Z, and for the purposes of frequency of operation, this is the only property of the crystal that matters. Therefore, to make your oscillator operate at the frequency f, you need crystals that have impedance Z at the frequency f. So, at worst, all you need to specify is a single complex number Z = R+jX. In fact, it is even simpler than this. 

While in principal one should specify the crystal resistance R at the frequency f, usually the crystal-to- crystal variation in R and the oscillator’s sensitivity to this variation are sufficiently low that a specification of R is not necessary. This is not to say that the crystal resistance has no effect; it does. We shall discuss this further in Section 4. 

So, that leaves a single value to specify: The crystal reactance X at f. So, one could specify a crystal having a reactance of 400 ? at 20 MHz. Instead,however, this is normally done by specifying a capacitance C L and equating.

where we have set ω = 2πf. Physically, at this frequency, the impedance of the series combination of the crystal and a capacitance C L has zero phase (equivalently, has zero reactance or is purely resistive). See Figure 1. To see this, consider

where the second step follows by Equation (1) and the fact that the reactance of a capacitance C is -1/( ωC).

Figure 1—This series combination has zero-phase impedance at a frequency where the crystal has load capacitance CL

So, the task of assuring proper oscillation frequency is the task of providing components (crystals in this case) that, at the specified frequency, have the required reactance, which is stated in terms of a capacitance CL by Equation (1).2 For example, instead of specifying crystals having a reactance of 400 ? at 20 MHz, we specify crystals having a load capacitance of 20 pF at 20 MHz, or more normally, we specify that the crystal frequency be 20 MHz at a load capacitance of 20 pF. 

In “parallel resonant circuits,” CL is positive, typically being between 5 pF and 40 pF. In this case the crystal operates in that narrow frequency band between the crystal’s series and parallel resonant frequencies (F s and F p , respectively).

While a truly “series resonant circuit” does not have a load capacitance associated with it [or perhaps an infinite value by Equation (1)], most “series resonant circuits” actually operate slightly off of the series resonant frequency and therefore do have a finite load capacitance (that can be positive or negative).However, if this offset is small and specifying a load capacitance is not desired, it can either be ignored or handled by a slight offset in the specified frequency f.

As we shall see in Section 4, both the oscillator and the crystal determine C L . However, the crystal’s role is rather weak in that in the limit of zero resistance,the crystal plays no role at all in determining C L . In this limiting case, it makes sense to refer to C L as the oscillator load capacitance as it is determined entirely by the oscillator. However, when it comes time to order crystals, one specifies crystals having frequency f at a load capacitance C L , i.e. it is a condition on the crystal’s frequency. Because of this,it would be reasonable to refer to C L as the crystal load capacitance. For the sake of argument, we simply avoid the issue and use the term loadcapacitance.

注释：1> When ordering crystals for series resonant operation,instead of specifying a value for C L , be sure to state that the frequency f refers to the series-resonant frequency, F s .

2> This is not to say that all aspects of frequency determination are tied to this single number. For example,other aspects of the crystal and oscillator determine whether the correct mode of oscillation is selected and the system’s frequency stability (short and long term).

3. Defining F L at C L

We now take Equation (1) as our defining relation for what we mean by a crystal having a given frequency at a given load capacitance.

Definition: A crystal has frequency F L at a load capacitance C L when the reactance X of the crystal at frequency F L is given by Equation (1), where now ω = 2πF L .

Recall that, around a given mode, the reactance of a crystal increases from negative values, through zero at series resonance, to large positive values near parallel resonance where it rapidly decreases to large negative values, and then again it increases towards zero. (See Reference [1].) By excluding a region around parallel resonance, we have a single frequency for each value of reactance. In this way,we can associate a frequency F L given a value of C L .So, positive values of C L correspond to a frequency between series and parallel resonance. Large negative values of C L , correspond to a frequency below series resonance while smaller negative values correspond to frequencies above parallel resonance.(See Equation (3) below.)

3.1. The crystal frequency equation So, how much does the frequency of oscillation depend on the load capacitance C L ? We can answer this question by determining how the crystal frequency F L depends on the crystal load capacitance CL . One can show that to a very good approximation that

where C 1 and C 0 are the motional and static capacitances of the crystal, respectively. (See Reference [1] for a derivation and discussion of this relation.) For the purposes of this note, we shall refer to Equation (3) as the crystal frequency equation.

This shows the dependence of a crystal oscillator’s operational frequency on its load capacitance and its dependence on the crystal itself. In particular, the fractional frequency change when changing the load capacitance from C L1 to C L2 is given to good approximation by

3.2. Trim sensitivity

Equation (3) gives the dependence of operating frequency F L on the load capacitance C L . The negative fractional rate of change of the frequency with C L is known as the trim sensitivity, TS. Using Equation (3), this is approximately

From this we see that the crystal is more sensitive to given change in C L at lower values of C L .

4. But what determines C L ?

Consider the simple Pierce oscillator consisting of a crystal, an amplifier, and gate and drain capacitors as shown in Figure 2.

There are at least three stray capacitances that must be considered in trying to calculate the load capacitance of the Pierce oscillator circuit.

1.  An added capacitance from the input of the amplifier to ground. Sources for this could be the amplifier itself and trace capacitance to ground. As this capacitance is in parallel with C G , we can simply absorb this into our definition of C G . (That is C G is the capacitance of the capacitor to ground plus any additional capacitance to ground on this side of the amplifier.)

2.  An added capacitance from the output of the amplifier to ground. Sources for this could be the amplifier itself and trace capacitance to ground. As this capacitance is in parallel with C D , we can simply absorb this into our definition of C D . (That is C D is the capacitance of the capacitor to ground plus any additional capacitance to ground on this side of the amplifier.)

3.  A stray capacitance C s shunting the crystal as shown in Figure 2.

Redefining C G and C D as discussed above, it then follows [2] that one of the conditions for oscillation is 

Where

is the impedance of the parallel combination of the crystal and the capacitance C s and R o is the output resistance of the amplifier.

It can be shown that the crystal resistance R as a function of load capacitance C L is given approximately by (provided C L is not too small)

where R 1 is the motional resistance of the crystal [1].It then follows that (provided C L – C s is not too small)

And

With these results, Equation (6) gives the following equation for C L

where R ′ is approximated by Equation (9). Note that the equation for C L is actually a bit more complicated than it might seem at first as R ′ depends upon on C L.It can be seen that C L decreases as R 1 increases, and so by Equation (3), the frequency of operation increases with crystal resistance. So, the load capacitance does have a dependence on the crystal itself. But as we have mentioned previously, the variation in crystal resistance and resulting sensitivity to this variation is usually sufficiently low that the dependence can be ignored. (In this case, a nominal value for crystal resistance is used in calculating C L .)

However, sometimes the resistance effect cannot be ignored. Two crystals tuned so that both have exactly the same frequency at a given load capacitance C L can oscillate at different frequencies in the same oscillator if their resistances differ. This slight difference leads to an increase in the observed system frequency variation above that due to crystal frequency calibration errors and the board-to-board component variation.

Note that in the case of zero crystal resistance (or at least negligible compared to the output resistance Ro of the amplifier), Equation (11) gives

So, in this case, the load capacitance is the stray capacitance shunting the crystal plus the series capacitance of the two capacitances on each side of the crystal to ground.

5. Measuring CL

While in principal one could calculate C L from the circuit design, an easier method is simply to measure C L . This is also more reliable since it does not rely on the oscillator circuit model, takes into account the strays associated the layout (which can be difficult to estimate), and it takes into account the effect of crystal resistance. Here are two methods for measuring C L .

5.1 Method 1

This method requires an impedance analyzer, but does not require knowledge of the crystal parameters and is independent of the crystal model.

1.  Get a crystal that is similar to those that will be ordered, i.e. having similar frequency andresistance.

2.  Place this crystal in the oscillator and measurethe frequency of operation F L . In placing the crystal into the circuit, be careful not to damage it or do anything to cause undue frequency shifts.(If soldered in place, allow it to cool down to room temperature.) A good technique that avoids soldering is simply to press the crystal onto the board’s solder pads using, for example,the eraser end of a pencil and observe the oscillation frequency. Just be careful that the crystal makes full contact with the board. The system can still oscillate at a somewhat higher frequency without the crystal making full contact with the board.

3.  Using an impedance analyzer, measure the reactance X of the crystal at the frequency F L determined in Step 2.

4.  Calculate C L using Equation (1) and the measured values for F L ( ω = 2πF L ) and X at F L .

5.2 Method 2

This method is dependent upon the four-parameter crystal model and requires knowledge of these parameters (through your own measurement or as provided by the crystal manufacturer).

1.  Get a crystal that is similar to those that will be ordered, i.e. having similar frequency and resistance.

2.  Characterize this crystal. In particular measure its series frequency Fs , motional capacitance C1,and static capacitance C0.

3.  Place this crystal in the oscillator and measure the frequency of operation F L (as in Method 1,Step 2.)

4.  Calculate C L using Equation (3) and the measured values for F L , F s , C 1 , and C 0 .

It is recommended that either procedure be followed with at least 3 crystals. When done properly, this technique often gives values for C L that are consistent to about 0.1 pF. Further confidence in the final results can be found by repeating the procedure for a number of boards to estimate the board-to-board variation of C L .

Note that in the above, F L does not have to be precisely the desired oscillation frequency f. That is, the calculated value for C L is not a strong function of the oscillation frequency since normally only the crystal is strongly frequency dependent. If, for some reason, the oscillator does have strong frequency dependent elements, then using this procedure would be quite difficult.

6. Do I really need to specify a value for CL ?

There are at least three cases where a specification of C L is not necessary:

1.  You intend to operate the crystals at their series-resonant frequency.

2.  You can tolerate large errors in frequency (on theorder of 0.1% or more).

3.  The load capacitance of your circuit is sufficiently near the standard value (see crystal data sheet) that the frequency difference is tolerable. This difference can be calculated with Equation (4).

If your application does not meet one of the three conditions above, you should strongly consider estimating the load capacitance of your oscillator and use this value in specifying your crystals.

What is Tri-State Function?

トライステート関数とは

1. In oscillator with Tri-state function, oscillator output can be controlled by the Tri-state pin as follows:
Logic High : Output Enable
Logic Low :Output Disable

トライステート機能付きオシレータでは、次のようにトライステートピンでオシレータ出力を制御できます。
ロジックハイ：出力イネーブル
ロジックロー：出力ディセーブル
2. The Tri-state function would allow output pin to assume high-impedance state, effectively removing the oscillator output from the circuit.

トライステート機能により、出力ピンをハイインピーダンス状態にすることができ、回路から発振器の出力を効果的に取り除くことができます。

3. Oscillator circuits can remain on or be turned off while output is disabled in Tri-State.

出力がトライステートでディスエーブルされている間、発振回路はオンのままにするかオフにすることができます。

Oscillator Operating Mode in Tri-state:Oscillator Circuits Off

トライステートの発振器動作モード：発振器回路オフ

•Advantage :Lower standby current

•利点：スタンバイ電流が低い

•Drawback :Longer startup time:( Fundamental mode > 0.2mS),( 3rd Overtone mode > 2mS)

•欠点：起動時間が長くなります:(基本モード> 0.2ミリ秒）、（3倍音モード> 2ミリ秒）

Oscillator Operating Mode in Tri-state:Oscillator Circuits On

トライステートのオシレータ動作モード：オシレータ回路オン

•Advantage:Shorter output enable time(< 0.1mS)

利点：短い出力イネーブル時間（<0.1mS）

•Drawback:Higher standby current

欠点：高いスタンバイ電流

Standby Current Comparison between Different Oscillator Operating Mode

異なる発振器動作モード間の待機電流の比較

•Only PX/PY series have oscillator on/off option when output is disabled.

出力が無効の場合、PX / PYシリーズのみオシレータのオン/オフオプションがあります。

•All other oscillator series have oscillator turned off in Tri-state.

他のすべての発振器シリーズは、トライステートで発振器がオフになっています。

How to Disable Tri-State Function

トライステート機能を無効にする方法

•If Tri-state function is no needed, the Tri-state pin shall be connected to the Vcc pin or left floating.

トライステート機能が不要な場合は、トライステートピンをVccピンに接続するか、フローティングのままにします。

There is a internal pull- up resistor which would enable output if Tri-state pin is left floating.

トライステートピンをフローティングのままにしておくと、出力をイネーブルする内部プルアップ抵抗があります。

•TAITIEN recommends connecting Tri-State pin to VCC if Tri-state function is not needed.

トライステート機能が不要な場合は、トライステート端子をVCCに接続することをお勧めします。